Senin, 19 November 2012

GERBANG LOGIKA DASAR

Tabel Kebenaran
gerbang NANDGerbang Logika => blok dasar untuk membentuk rangkaian elektronika digital
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·         Sebuah gerbang logika mempunyaisatu terminal output dan satu atau lebih terminal  input
·         Output-outputnya bisa bernilaiHIGH (1) atau LOW (0) tergantung dari level-level digital pada terminal inputnya.
·         Ada 7 gerbang logika dasar : AND, OR, NOT, NAND, NOR, Ex-OR, Ex-NOR
1. GerbangAND
Simbol gerbanglogika AND
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Operasi AND :
• Jika Input A AND B keduanya HIGH, maka output X akan HIGH
• Jika Input A atau B  salah satu atau keduanya LOW maka output X akan LOW
Tabel Kebenaran gerbang AND – 2 input
Cara kerja GerbangAND
Analogi elektrikal gerbang AND
GerbangA ND denganswitch Transistor
Gerbang AND dengan banyakInput
TabelKebenaranAND-4 input :
2. GerbangOR
Simbol gerbanglogika OR
Operasi OR : • J ika Input A OR B atau keduanya HIGH, maka output X akan HIGH • J ika Input A dan B  keduanya LOWmaka output X akan LOW
Tabel Kebenaran gerbang OR –2 input :
Cara kerja GerbangOR :
Analogi elektrikal gerbang O R
GerbangO R dengan switch Transistor
Gerbang OR denganbanyakInput :
TabelKebenaranOR-3 input :
3. GerbangNOT / INVERTER
Simbol gerbanglogika NOT
Operasi NOT :
• J ika Input A  HIGH, maka output X akan LOW
• J ika Input A  LOW, maka output X akan HIGH
Tabel Kebenaran gerbang NOT / INVERTE R
4. GerbangNAND
atau 
Simbol gerbanglogika NAND
Operasi NAND :
• Merupakan Inversi (kebalikan) dari operasi AND
• J ika Input A AND B keduanya HIGH, maka output X akan LOW
• J ika Input A atau B atau keduanya LOW, maka output X akan HIGH




 

Kamis, 14 Oktober 2010

Display

1. Lampu LED
 

2. Seven Segment











3. LED Dot Matrik

4. LCD Character









5. LCD Gafis ( GLCD ) :














Data IC CMOS

HEF 4000 Double door NOT - OR at 3 entries + reverser
4001 Quadruple door NOT - OR at 2 entries 
4002 Double door NOT - OR at 4 entries
4006 Register with static shift 18 stages
4007 Double complementary pair + reverser
4008 Adder 4 bits with reserve
4011 Quadruple door NOT - AND
4012 Double door NOT - AND at 4 entries
4013 Double rocker D
4014 Register with shift 8 bits
4015 Double register with shift 4 bits
4016 Quadruple bidirectional switch
4017 Johnson meter on 5 floors
4018 Dividing meter by 'n' programmable
4019 Quadruple multiplexer at 2 entries
4020 Binary counter on 14 floors
4021 Register with shift 8 bits
4022 Johnson meter on 4 floors, divider by 8
4023 Triple carries NOT - AND at 3 entries
4024 Binary counter on 7 floors
4025 Triple carries NOT - OR at 3 entries
4027 Double rocker J - K
4028 Decoder BCD - decimal (1 among 10)
4029 Meter / synchronous, binary/decimal discounting machine
4030 Quadruple EXCLUSIVE-OR door
4031 Register with shift 64 bits
4035 Register with universal shift 4 bits
4040 Binary counter on 12 floors
4041 Quadruple door of power with complementary exit
4042 Quadruple rocker D with locking
4043 Quadruple rocker NOT - OR - R / S with locking (left 3 states)
4044 Quadruple rocker NOT - AND - R / S with locking (left 3 states)
4046 Buckle with controlled phase (PLL)
4047 Monostable
4049 Sixfold door of power (reverser)
4050 Sixfold door of power (not - reverser)
4051 Analogical multiplexer/demultiplexer with 8 channels
4052 Double multiplexer/analogical demultiplexer with 4 channels
4053 Triple analogical multiplexer/demultiplexer with 2 channels
4054 Driver for bill-poster 4 segments LCD
4056 Decoder BCD for bill-poster 7 segments LCD
4060 A meter-divider 14 stages with oscillator
4066 Quadruple bidirectional switch
4067 Multiplexer 16 - 1
4068 Carry NOT - AND at 8 entries
4069 Sixfold reverser
4070 Quadruple EXCLUSIVE-OR door
4071 Quadruple door OR at 2 entries
4072 Double door OR at 4 entries
4073 Triple carries AND at 3 entries
4075 Triple carries OR at 3 entries
4078 Carry NOT - OR at 8 entries
4081 Quadruple door AND at 2 entries
4082 Double door AND at 4 entries
4085 Double door AND / OR - NOT to 2 x 2 entries
4086 Door AND / OR - NOT to 4 x 2 entries
4093 Quadruple trigger of Schmitt NAND at 2 entries
4098 Double monostable red├ęclenchable
4104 Quadruple translator of tension at exit 3 states
4510 Meter / discounting machine BCD
4511 Decoder / driver 7 segments
4514 Decoder / demultiplexer 1 among 16, with register of entry (high exit)
4515 Decoder / demultiplexer 1 among 16, with register of entry (low exit)
4516 Binary meter / discounting machine
4518 Double decimal scaler
4519 Quadruple multiplexer at 2 entries
4520 Double binary counter
4528 Double monostable red├ęclenchable
4539 Double multiplexer at 4 entries
4555 Double decoder / demultiplexer 1 among 4 (high exit)
4556 Double decoder/demultiplexer 1 among 4 (low exit)
4720 Read-write memory 256 bits (256 x 1)
4721 Read-write memory 1024 bits (256 x 4)
4724 Addressable register 8 bits with locking
4736 Read-write memory 1 024 (1 024 x 1)
40097 Sixfold door of power, exit 3 states (not reverser)
40098 Sixfold door of power, exit 3 states (reverser)
40106 Six triggers of Schmitt reversers
40174 Sixfold rocker D
40175 Quadruple rocker D
40192 Meter / synchronous discounting machine 4 bits decimal
40193 Binary meter / synchronous discounting machine 4 bits
40194 Register with bidirectional universal shift 4 bits
40195 Register with universal shift 4 bits
HIGH OF PAGE 1. 4. - STITCHING OF THE CIRCUITS OF LOGIC : FAMILY CMOS
4000.GIF4001.GIF
4002.GIF4006.GIF
4007.GIF4008.GIF
4011.GIF4012.GIF
4013.GIF4014.GIF
4015.GIF4016_4066.GIF
4017.GIF4018.GIF
4019.GIF4020.GIF
4021.GIF4022.GIF
4023.GIF4024.GIF
4025.GIF4027.GIF
4028.GIF4029.GIF
4030_4070.GIF4031.GIF
4035.GIF4040.GIF
4041.GIF4042.GIF
4043.GIF4044.GIF
4046.GIF4047.GIF
4049.GIF4050.GIF
4051.GIF4052.GIF
4053.GIF4054.GIF
4056.GIF4060.GIF
4067.GIF
4068.GIF4069.GIF
4071.GIF4072.GIF
4073.GIF4075.GIF
4078.GIF4081.GIF
4082.GIF4093.GIF
4098_4528.GIF40106.GIF
4511.GIF4518_4520.GIF

 
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